Topic: in-memory computing

Paritosh Ramanan presents algorithm–hardware co-design for reliable linear algebra and optimization on resistive-memory in-memory computing systems. The distributed MELISO simulation framework supports multiple hardware models, while multilevel error correction makes noisy, low-energy devices useful for matrix-vector multiplication. Simulations report energy improvements of up to five orders of magnitude and latency reductions of up to two for high-dimensional linear algebra. A distributed primal-dual hybrid gradient solver for linear programs combines convergence analysis under device noise w

Spiking recurrent neural networks (RNNs) are a promising tool for solving a wide variety of complex cognitive and motor tasks, due to their rich temporal dynamics and sparse processing. However training spiking RNNs on dedicated neuromorphic hardware is still an open challenge. This is due mainly to the lack of local, hardware-friendly learning mechanisms that can solve the temporal credit assignment problem and ensure stable network dynamics, even when the weight resolution is limited. These challenges are further accentuated, if one resorts to using memristive devices for in-memory computing