Fault-Tolerant, Distributed In-Memory Computing for Large-Scale Linear Algebra and Optimization: An Algorithm–Hardware Co-Design Approach

Paritosh Ramanan presents algorithm–hardware co-design for reliable linear algebra and optimization on resistive-memory in-memory computing systems. The distributed MELISO simulation framework supports multiple hardware models, while multilevel error correction makes noisy, low-energy devices useful for matrix-vector multiplication. Simulations report energy improvements of up to five orders of magnitude and latency reductions of up to two for high-dimensional linear algebra. A distributed primal-dual hybrid gradient solver for linear programs combines convergence analysis under device noise with simulated gains of up to two orders in latency and three in energy over GPU baselines on medium-scale problems. Preliminary randomized Kaczmarz results use online signal-to-noise estimates to select rows, comparing this strategy with offline alternatives. The talk closes with open problems in in-memory computation.