Computer Engineering seminars

This introductory webinar connects the physical foundations of quantum computing with present research infrastructure. Matthew Viljoen explains qubits, superposition, entanglement and the transition from classical binary logic to quantum algorithms. Attila Csaba Marosi surveys quantum-hardware types, architectures and practical capabilities, mapping systems available in Europe and beyond. An open discussion considers how infrastructure operators, developers and domain scientists can prepare hybrid classical–quantum workflows within the EGI Federation’s 2026–2030 strategy.

Seminar by Morten Kjaergaard (Niels Bohr Institute, University of Copenhagen) on rapid FPGA-based feedback for superconducting qubits, including sparse-sampling techniques and on-FPGA inference enabling millisecond-timescale T1 estimation, ~100 ms readout optimization, and over 74,000 consecutive recalibrations in closed-loop operation.

Srini Devadas examines how hardware and cryptography can strengthen each other. Hardware can protect keys, monitor attacks in real time and reduce the trusted computing base, while hardware vulnerabilities can undermine software security. The talk presents research on accelerating cryptographic computation and using those capabilities to design more efficient protocols. It also asks how cryptography and new security definitions can guide the construction of secure hardware. Devadas is MIT's Webster Professor of Electrical Engineering and Computer Science. Hybrid: MIT Stata Center, Room 32-G449 (Kiva), 32 Vassar Street, Cambridge, MA 02139; online via Zoom. Thursday 24 September 2026, talk at 19:00 EDT (UTC−4); in-person refreshments begin at 18:30. This public event is organized by the Boston Chapter of the IEEE Computer Society and GBC/ACM. Register through the organizer-linked Zoom form for either mode and indicate online or in-person attendance. For physical access, use the Stata Center entrance nearest Main Street, then the fourth-floor elevators.

Florian Marquardt surveys approaches to reducing the energy and computational cost of neural networks by implementing their functions in physical devices. The central question is how experiments can efficiently determine updates to adjustable parameters, allowing the hardware itself to learn. Examples include learning through time reversal, obtaining nonlinear computation from linear optical scattering, and training analog quantum simulators as neuromorphic systems. The seminar is available in person and through the registration link on the organizer’s event page.

Paritosh Ramanan presents algorithm–hardware co-design for reliable linear algebra and optimization on resistive-memory in-memory computing systems. The distributed MELISO simulation framework supports multiple hardware models, while multilevel error correction makes noisy, low-energy devices useful for matrix-vector multiplication. Simulations report energy improvements of up to five orders of magnitude and latency reductions of up to two for high-dimensional linear algebra. A distributed primal-dual hybrid gradient solver for linear programs combines convergence analysis under device noise with simulated gains of up to two orders in latency and three in energy over GPU baselines on medium-scale problems. Preliminary randomized Kaczmarz results use online signal-to-noise estimates to select rows, comparing this strategy with offline alternatives. The talk closes with open problems in in-memory computation.

Over the past decade our community has made substantial progress in the construction of anatomically detailed network models of the cortical tissue. Thanks to advances in computer hardware and simulation technology, researchers can now routinely work with these models at the natural density of neurons and synapses. Moreover, the availability of cloud services means that such investigations can be carried out without having to install either the model or the simulation software. A recent workshop analyzed the impact of a specific model of the cortical microcircuit, published ten years ago . The model has been reused in multiple contexts: for reproduction studies, validation of mean-field approaches, exploration of methods of model sharing, and as a building block for larger models. Although the model was less successful in inspiring further neuroscientific studies than the authors of the original work had hoped, it became a de facto benchmark for neuromorphic computing systems. It sparked a constructive race for ever shorter simulation times and lower energy consumption. The quantitative comparison of different platforms reveals qualitative differences between conventional and neuromorphic hardware and limits of speed-up. The structure of the model is based on light microscopy because these were the data available at the time. Guided by simulation results and physiological evidence, the original publication hypothesized a preference of excitatory neurons for inhibitory targets. Modern electron microscopy data of cortical volumes combined with AI based reconstruction techniques is capable of resolving individual synaptic connections. This advances the concept of digital twins of the cortical network to a new level of precision, and has already enabled us to confirm the assumption of target type specifity underlying earlier models. Maybe with the progress sketched here, our community is at a transition point where it becomes easier to cooperatively and incrementally work on models with a larger explanatory scope. Presented in the van Vreeswijk Theoretical Neuroscience Seminar series (formerly WWTNS) on 2025-12-10. Recording duration: 00:39:15.

The use of electronic circuits to model neural systems goes back to C. Mead and is present in models, from leaky-integrate-and-fire to Hodking-Huxley. Simulating neural network with analog hardware is attractive: it allows to implement neurocomputations in real time without discretization approximations, it has perfect simulation-time scaling with system size, and it provides ready-to-deploy neuromorphic circuit for applications. There are implementations in CMOS technology, however, they are complex, require sophisticated fabrication facilities and, most important, suffer from significant device mismatch. In a radically different approach, based on the concept of memristors, we introduce a neuro-synaptic circuit of unprecedented simplicity, with readily available cheap off-the-shelf electronic components, that can quantitatively reproduce textbook theoretical neuron and synaptic current models. Our neuron circuits can avoid the mismatch problem and are easily tuneable at bio-compatible time-scales. We first introduce a voltage-gated conductance bursting neuron model that produces spike traces that bare striking similarity to experimental recordings. We then introduce synaptic current circuits and show the modularity of our method implementing neurocomputing primitives of basic network motifs, including CPGs. With this "theoretical hardware" approach we show: (i) that neuron adaptation and self-excitation can be viewed as a self-consistent dynamical problem; (ii) that a dynamical memory can be minimally implemented with a single recursive spiking neuron; (iii) that an adaptive membrane current reveals a connection between bursting and the driven harmonic oscillator, perhaps pointing to a neural correlate of the pendular limb motion. Finally we discuss the limitation of the approach to networks of mid-size and its potential application for brain-machine-interfaces, robotics and AI. Presented in the van Vreeswijk Theoretical Neuroscience Seminar series (formerly WWTNS) on 2025-03-19. Recording duration: 00:43:46.

Edmund will present why to use FPGAs when building scientific instruments, when and why to use open source FPGA tools, the history of their development, their development status, currently supported FPGA families and functions, current developments in design languages and tools, the community, freely available design blocks, and possible future developments.

This course provides a fundamental foundation in the modern techniques of experimental neuroscience. It introduces the essentials of sensors, motor control, microcontrollers, programming, data analysis, and machine learning by guiding students through the “hands on” construction of an increasingly capable robot. In parallel, related concepts in neuroscience are introduced as nature’s solution to the challenges students encounter while designing and building their own intelligent system.

Biologically plausible spiking neural networks (SNNs) are an emerging architecture for deep learning tasks due to their energy efficiency when implemented on neuromorphic hardware. However, many of the biological features are at best irrelevant and at worst counterproductive when evaluated in the context of task performance and suitability for neuromorphic hardware. In this talk, I will present an alternative paradigm to design deep learning architectures with good task performance in real-world benchmarks while maintaining all the advantages of SNNs. We do this by focusing on two main features – event-based computation and activity sparsity. Starting from the performant gated recurrent unit (GRU) deep learning architecture, we modify it to make it event-based and activity-sparse. The resulting event-based GRU (EGRU) is extremely efficient for both training and inference. At the same time, it achieves performance close to conventional deep learning architectures in challenging tasks such as language modelling, gesture recognition and sequential MNIST.

Spiking recurrent neural networks (RNNs) are a promising tool for solving a wide variety of complex cognitive and motor tasks, due to their rich temporal dynamics and sparse processing. However training spiking RNNs on dedicated neuromorphic hardware is still an open challenge. This is due mainly to the lack of local, hardware-friendly learning mechanisms that can solve the temporal credit assignment problem and ensure stable network dynamics, even when the weight resolution is limited. These challenges are further accentuated, if one resorts to using memristive devices for in-memory computing to resolve the von-Neumann bottleneck problem, at the expense of a substantial increase in variability in both the computation and the working memory of the spiking RNNs. In this talk, I will present our recent work where we introduced a PyTorch simulation framework of memristive crossbar arrays that enables accurate investigation of such challenges. I will show that recently proposed e-prop learning rule can be used to train spiking RNNs whose weights are emulated in the presented simulation framework. Although e-prop locally approximates the ideal synaptic updates, it is difficult to implement the updates on the memristive substrate due to substantial device non-idealities. I will mention several widely adapted weight update schemes that primarily aim to cope with these device non-idealities and demonstrate that accumulating gradients can enable online and efficient training of spiking RNN on memristive substrates.

A great deal of understanding can be gleaned from direct observation of organismal growth, development, and behavior. However, direct observation can be time consuming and influence the organism through unintentional stimuli. Additionally, video capturing equipment can often be prohibitively expensive, difficult to modify to one’s specific needs, and may come with unnecessary features. Here, we describe the PiSpy, a low-cost, automated video acquisition platform that uses a Raspberry Pi computer and camera to record video or images at specified time intervals or when externally triggered. All settings and controls, such as programmable light cycling, are accessible to users with no programming experience through an easy-to-use graphical user interface. Importantly, the entire PiSpy system can be assembled for less than $100 using laser-cut and 3D-printed components. We demonstrate the broad applications and flexibility of the PiSpy across a range of model and non-model organisms. Designs, instructions, and code can be accessed through an online repository, where a global community of PiSpy users can also contribute their own unique customizations and help grow the community of open-source research solutions.

Talks and panel discussions around the LifeQ process of moving from the embedded engineering of sensors on edge devices to big health data analysis in the cloud.

In this talk, I aim to show that the dynamical properties of emerging nanodevices can accelerate the development of smart, and environmentally friendly chips that inherently learn through their physics. The goal of neuromorphic computing is to draw inspiration from the architecture of the brain to build low-power circuits for artificial intelligence. I will first give a brief overview of the state of the art of neuromorphic computing, highlighting the opportunities offered by emerging nanodevices in this field, and the associated challenges. I will then show that the intrinsic dynamical properties of these nanodevices can be exploited at the device and algorithmic level to assemble systems that infer and learn though their physics. I will illustrate these possibilities with examples from our work on spintronic neural networks that communicate and compute through their microwave oscillations, and on an algorithm called Equilibrium Propagation that minimizes both the error and energy of a dynamical system.

The story of event cameras starts from the very beginnings of neuromorphic engineering with Misha Mahowald and Carver Mead. The chip design of these “silicon retina” cameras is the most crucial aspect that might enable them to come to mass production and widespread use. Once we have a usable camera is just the beginning, because now we need to think of our use of the data as though we were some type of artificial “silicon cortex”. That step has just started but the last few years have brought some remarkable results from the computer vision community. This talk will have a lot of live demonstrations.

Engineered pattern-recognition systems strive for short time-to-solution and low energy-to-solution characteristics. This represents one of the main driving forces behind the development of neuromorphic devices. For both them and their biological archetypes, this corresponds to using as few spikes as early as possible. The concept of few and early spikes is used as the founding principle in the time-to-first-spike coding scheme. Within this framework, we have developed a spike-timing-based learning algorithm, which we used to train neuronal networks on the mixed-signal neuromorphic platform BrainScaleS-2. We derive, from first principles, error-backpropagation-based learning in networks of leaky integrate-and-fire (LIF) neurons relying only on spike times, for specific configurations of neuronal and synaptic time constants. We explicitly examine applicability to neuromorphic substrates by studying the effects of reduced weight precision and range, as well as of parameter noise. We demonstrate the feasibility of our approach on continuous and discrete data spaces, both in software simulations and on BrainScaleS-2. This narrows the gap between previous models of first-spike-time learning and biological neuronal dynamics and paves the way for fast and energy-efficient neuromorphic applications.

The potential of machine learning and deep learning to advance artificial intelligence is driving a quest to build dedicated computers, such as neuromorphic hardware that emulate the biological processes of the brain. While the hardware technologies already exist, their application to real-world tasks is hindered by the lack of suitable programming methods. Advances at the interface of neural computation and machine learning showed that key aspects of deep learning models and tools can be transferred to biologically plausible neural circuits. Building on these advances, I will show that differentiable programming can address many challenges of programming spiking neural networks for solving real-world tasks, and help devise novel continual and local learning algorithms. In turn, these new algorithms pave the road towards systematically synthesizing machine intelligence in neuromorphic hardware without detailed knowledge of the hardware circuits.